Nepal Flag sumanbhandary@ctevtsolution.com
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Computer Loksewa Exam

10:00
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1. The systems which allow only one process execution at a time, are called __________

2. Random access is not allowed in ___________

3. Which of the following are forms of malicious attack?

4. A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of 80 and a CPU burst of 35. The total CPU utilization is ____________

5. The Memory Address Register

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6. In which addressing mode the effective address of the operand is the contents of a register specified in the instruction and after accessing the operand, the contents of this register is incremented to point to the next item in the list?

7. Memory protection in a paged environment is accomplished by ____________

8. Interprocess communication

9. Fragmentation of the file system

10. What is MPEG compression?

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11. Those processes should be aborted on occurrence of a deadlock, the termination of which?

12. In a ______ real time system, it is guaranteed that critical real time tasks will be completed within their deadlines.

13. Which process can be affected by other processes executing in the system?

14. CPU fetches the instruction from memory according to the value of ____________

15. To avoid the race condition, the number of processes that may be simultaneously inside their critical section is

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16. CPU scheduling is the basis of ___________

17. Given a priori information about the ________ number of resources of each type that maybe requested for each process, it is possible to construct an algorithm that ensures that the system will never enter a deadlock state.

18. Concurrent access to shared data may result in ____________

19. The segment of code in which the process may change common variables, update tables, write into files is known as ____________

20. Bug means

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21. Which of the following addressing modes, facilitates access to an operand whose location is defined relative to the beginning of the data structure in which it appears?

22. CPU scheduling is the basis of ___________

23. How does the software trigger an interrupt?

24. The Storage-to-Storage instructions

25. Assembly code data base is associated with